radeon: use direct mapping for fast fb access.
Signed-off-by: Samuel Li <samuel.li@amd.com>
This commit is contained in:
parent
bd2557ea5e
commit
365e571d9d
5 changed files with 42 additions and 5 deletions
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@ -232,7 +232,7 @@ The default value is
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for R/RV3XX, R/RV4XX, R/RV5XX, RS6XX, RS740, R/RV6XX, R/RV7XX, RS780, RS880,
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EVERGREEN, CAYMAN, and ARUBA and
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.B off
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for R/RV/RS1XX, R/RV/RS2XX, and RS3XX.
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for R/RV/RS1XX, R/RV/RS2XX, RS3XX, and RS690/RS780/RS880 when fast fb feature is enabled.
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.TP
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.BI "Option \*qColorTiling2D\*q \*q" "boolean" \*q
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The framebuffer can be addressed either in linear, 1D, or 2D tiled modes. 2D tiled mode can
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@ -280,7 +280,7 @@ we use a heuristic based on VRAM amount to determine whether to allow EXA
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to use VRAM for non-essential pixmaps. This option allows us to override the
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heuristic. The default is
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.B on
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with > 32MB VRAM, off with < 32MB.
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with > 32MB VRAM, off with < 32MB or when fast fb feature is enabled for RS690/RS780/RS880.
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.TP
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.BI "Option \*qSwapbuffersWait\*q \*q" boolean \*q
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This option controls the behavior of glXSwapBuffers and glXCopySubBufferMESA
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@ -1542,6 +1542,9 @@ R600UploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
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if (!radeon_bo_is_busy(driver_priv->bo, &dst_domain))
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goto copy;
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}
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/* use cpu copy for fast fb access */
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if (info->is_fast_fb)
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goto copy;
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}
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scratch_pitch = RADEON_ALIGN(w, drmmode_get_pitch_align(pScrn, (bpp / 8), 0));
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@ -425,6 +425,7 @@ typedef struct {
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Bool exa_pixmaps;
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Bool exa_force_create;
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XF86ModReqInfo exaReq;
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Bool is_fast_fb; /* use direct mapping for fast fb access */
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unsigned int xv_max_width;
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unsigned int xv_max_height;
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@ -412,6 +412,9 @@ RADEONUploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
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if (!radeon_bo_is_busy(driver_priv->bo, &dst_domain))
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goto copy;
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}
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/* use cpu copy for fast fb access */
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if (info->is_fast_fb)
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goto copy;
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}
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size = scratch_pitch * h;
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@ -319,6 +319,28 @@ radeon_flush_callback(CallbackListPtr *list,
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}
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}
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static Bool RADEONIsFastFBWorking(ScrnInfoPtr pScrn)
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{
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RADEONInfoPtr info = RADEONPTR(pScrn);
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struct drm_radeon_info ginfo;
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int r;
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uint32_t tmp = 0;
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#ifndef RADEON_INFO_FASTFB_WORKING
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#define RADEON_INFO_FASTFB_WORKING 0x14
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#endif
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memset(&ginfo, 0, sizeof(ginfo));
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ginfo.request = RADEON_INFO_FASTFB_WORKING;
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ginfo.value = (uintptr_t)&tmp;
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r = drmCommandWriteRead(info->dri2.drm_fd, DRM_RADEON_INFO, &ginfo, sizeof(ginfo));
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if (r) {
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return FALSE;
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}
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if (tmp == 1)
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return TRUE;
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return FALSE;
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}
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static Bool RADEONIsFusionGARTWorking(ScrnInfoPtr pScrn)
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{
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RADEONInfoPtr info = RADEONPTR(pScrn);
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@ -464,6 +486,12 @@ static Bool RADEONPreInitAccel_KMS(ScrnInfoPtr pScrn)
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return FALSE;
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}
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/* Check whether direct mapping is used for fast fb access*/
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if (RADEONIsFastFBWorking(pScrn)) {
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xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct mapping of fb aperture is enabled for fast fb access.\n");
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info->is_fast_fb = TRUE;
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}
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if (xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE) ||
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(!RADEONIsAccelWorking(pScrn))) {
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xf86DrvMsg(pScrn->scrnIndex, X_INFO,
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@ -839,7 +867,8 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
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* with proper bit, in the meantime you need to set tiling option in
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* xorg configuration files
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*/
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info->ChipFamily <= CHIP_FAMILY_ARUBA;
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info->ChipFamily <= CHIP_FAMILY_ARUBA &&
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!info->is_fast_fb;
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/* 2D color tiling */
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if (info->ChipFamily >= CHIP_FAMILY_R600) {
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@ -935,8 +964,9 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
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if (!info->use_glamor) {
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info->exa_pixmaps = xf86ReturnOptValBool(info->Options,
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OPTION_EXA_PIXMAPS,
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((info->vram_size > (32 * 1024 * 1024) &&
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info->RenderAccel)));
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(info->vram_size > (32 * 1024 * 1024) &&
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info->RenderAccel &&
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!info->is_fast_fb));
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if (info->exa_pixmaps)
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xf86DrvMsg(pScrn->scrnIndex, X_INFO,
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"EXA: Driver will allow EXA pixmaps in VRAM\n");
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